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•  Announces USB 2.0 Function Controller OVA Checker Assertion based Intellectual Property
 

Design and Reuse Headlines News – Wednesday, August 10th

 

CAMPBELL, Calif., August 10 - Silicon Interfaces, a high-end design services and leading provider for IP’s in Europe, USA and Japan, under their IP Development Program - Silicon Cores: Core to the Intelligent Systems™,today announced the availability of USB 2.0 OVA Checker IP, intellectual property (IP). The SI20USBOVA20, USB 2.0 OVA IP increases the portfolio of Silicon Interfaces IP’s.

 

USB 2.0 Function Controller Checker OVA IP is fully documented, off the shelf component for the Developers of the USB 2.0 compliant Function Controller. USB 2.0 OpenVera Assertions based Checker IP provides a concise, declarative mechanism to code the specification of sequences of events and activities of USB 2.0 Bus Protocol. USB 2.0 OVA protocol rule Checker can work in a standalone mode i.e., can be plugged in any design verification environment, which uses the standard Protocol without disturbing the structure.

 
SI20USBOVA20, USB2.0 OVA IP Features
 
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Fully compliant with the Universal Serial Bus Rev.2.0 specification. It accurately verifies the USB 2.0 protocol

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The Checker AIP follows the OpenVera™ unified flow for formal tools

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The assertions are checked with the Universal Transceiver Macrocell Interface on the UTM side

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The assertions are checked with the Generic Microcontroller Interface on Microcontroller side

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Provides monitoring of signals and data in transmit and receive directions

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Provides various error notifications based on the part of the protocol that gets violated such as PID and CRC errors

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Supports Host, Hub and Device properties

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Full programmability and versatility of the AIP allows connection to any standard USB device

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Categorization of templates such as Host, Hub, Device, HostHubDevice, UTMI and UTMI16 allows selective turning ON and OFF of features while testing

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The IP monitors the various transactions and their sequences

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Provides transmit and receive sequencing error notification

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Provides monitoring of signals and timings for reset, suspend and remote wake-up from the

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Provides monitoring of the Low speed, Full speed and High speed ports for all types of packets, fields, transactions and transfers

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The checker IP incorporates layered approach

 

For a complete listing of SI20USBOVA20, USB 2.0 OVA IP features and pricing, please contact siliconcores@siliconinterfaces.com or visit the Silicon Cores web site at www.siliconcores.com

 
Availability
 

The SI20USBOVA20, USB 2.0 OVA IP is available now

 
About USB 2.0 OVA Checker AIP
 

OpenVera Assertions (OVA) provide fast and accurate way to simplify and speed up the device verification task. In a complex design process, verification may take up to 70% of the development time. OVA Checker AIP speeds up the verification process, thereby optimizing cost and time to market. USB 2.0 OVA AIP Checker is developed using the abstraction in OVA syntax that is used in dynamic simulation of USB 2.0 based design.

 
Product Specifications
 
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The AIP can be adapted to test a standard USB device in Synopsys Magellan Formal Verification environment

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Supports PING Protocol

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Supports SPLIT transactions

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It can work with either 8-bit or 16-bit standard USB devices

 
 
 
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