VLSI DESIGN : FRONT-END
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Simulators : VCS, VCPS, ModelSim, Questa |
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Synthesis : RTL Compiler (RC), Exemplar Leonardo |
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Coverage : VCS / Questa |
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Low Power : VCLP / Questa PA |
| Fault Simulation : | |
| • | Siemens Austemper |
| • | Synopsys VC-ZOIX |
| • | FPGA AMD Xilinx, Intel Altera and Microsemi Actel |
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| • | Gigabit Development Kit ASIC design/ testing for Xaqti Corp, USA |
| • | Incorporating Multiple OS platform for Sun Workstations undertaken at Sun Microsystems, 1.5 mn gates. |
| • | Design & test of part of a Multimedia ASIC for Shareware Inc - USA. Subsidiary of Intel & Microsoft |
| • | Product support for Synopsys/Cadence - USA |
| • | Design support for Toshiba – USA |
| • | Development Wireless LAN Adapter for PDA, Japan |
| • | Designing the Advanced Sonet E3/DS3 Receiver/Transmitter (DART) Device |
| • | Development of Multi-Codec Pipeline |
| • | Design and Development of dNTSC Receiver |
| • | Design, testing & synthesis of receive FIFO of Agni |
| • | SMM Development and Integration for ARM 926EJ-S core and ETM9 |
| • | Interface Development – PCI, PCI-X, AMBA, OCP-IP, etc |
VLSI DESIGN : FRONT-END
Design Entry :
